| 摘要 |
<p>A semiconductor nonvolatile memory device which can adopt bit line system and can achieve an enhancement of speed of the read out time etc., which device adopting a differential type sensing system comprising a bit line BL and an inverted bit line BL_ connected in series to a sense amplifier SAf, wherein provision is made of a first memory cell MC1 connected to a word line WL and the bit line BL; a second memory cell MC2 connected to the word line WL which is common also for the first memory cell MC1, and, connected to the inverted bit line BL_; and a circuit BVA which retains the potential of either one of bit lines of the bit line BL and the inverted bit line BL_ at the first potential at the time of a read out operation, and, sets the potential of the other bit line at the second potential made to have a difference from the first potential for a predetermined time. <IMAGE></p> |
