Ball grid array by partitioned lamination process

摘要

A method for forming a ball grid array to provide a chip carrier with I/O capabilities is described. The method includes combining three distinct steps into one: partitioning a solder sheet into identical solder pieces using a mask provided with openings that match the footprint of the chip carrier; reflowing the solder pieces into solder balls; and joining the balls to the I/O pads of the chip carrier. By combining these three steps into one, a high throughput, high volume, defect free and contamination free operation for forming I/O connections thus results.