发明名称 Discrimination circuit capable of automatically optimizing discrimination level and discrimination phase
摘要 In controlling a discrimination level V1, V1 is controlled so that discrimination results based on discrimination levels V1+ DELTA V and V1- DELTA V each become equal to the discrimination result based on the discrimination level V1. If the discrimination result based on V1+ DELTA V does not agree with the discrimination result based on V1, V1 is lowered, and if the discrimination result based on V1- DELTA V does not agree with the discrimination result based on V1, V1 is raised. In controlling a discrimination phase PHI 1, PHI 1 is controlled so that discrimination results based on discrimination phases PHI 1+ DELTA PHI and PHI 1- DELTA PHI each become equal to the discrimination result based on the discrimination phase PHI 1. If the discrimination result based on PHI 1+ DELTA PHI does not agree with the discrimination result based on PHI 1, PHI 1 is delayed, and if the discrimination result based on PHI 1- DELTA PHI does not agree with the discrimination result based on PHI 1, PHI 1 is advanced.
申请公布号 US5736875(A) 申请公布日期 1998.04.07
申请号 US19960618941 申请日期 1996.03.20
申请人 FUJITSU LIMITED 发明人 SAKAMOTO, HISAYA;TSUDA, TAKASHI;NAGAKUBO, YASUNORI
分类号 G11B7/00;G11B7/005;H03D13/00;H03K5/08;H03K5/125;H04L25/03;(IPC1-7):H03K5/153;H01L31/00;H03K5/22 主分类号 G11B7/00
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