发明名称 Fast vector loading for automatic test equipment
摘要 Fast loading of a vector test pattern in a semiconductor device tester. Fast loading is achieved through the use of delta coding of vectors in conjunction with a vector cache in the vector loading circuitry of the tester. In this way, the total amount of information transmitted during the loading operation is reduced. Hardware required to implement the method is minimized by using random access memory conventionally found in automatic test equipment for the vector cache.
申请公布号 US5737512(A) 申请公布日期 1998.04.07
申请号 US19960653949 申请日期 1996.05.22
申请人 TERADYNE, INC. 发明人 PROUDFOOT, DAVID M.;REICHERT, PETER A.
分类号 G01R31/28;G01R31/3183;G01R31/319;(IPC1-7):G06F11/00 主分类号 G01R31/28
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