发明名称 |
Discharge circuit in a semiconductor memory |
摘要 |
A discharge circuit for a semiconductor memory includes a first node, a second node for receiving a control signal having first and second states, and a circuit connected between the first node and ground potential and to the second node. The circuit couples the first node to ground potential when the control signal has the first state and substantially isolates the first node from ground potential when the control signal has the second state. The circuit includes a first subcircuit for defining a current path between the first node and ground potential. The first subcircuit includes a plurality of transistors connected in series, each of which having a gate, source and drain. The circuit further includes a second subcircuit for effecting predetermined gate-to-source, and drain-to-source voltages of the transistors of the first subcircuit when the control signal has the second state.
|
申请公布号 |
US5736891(A) |
申请公布日期 |
1998.04.07 |
申请号 |
US19960585336 |
申请日期 |
1996.01.11 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BUTI, TAQI NASSER;HSU, LOUIS LU-CHEN;KUANG, JENTE B.;RATANAPHANYARAT, SOMNUK;SACCAMANGO, MARY J.;SHIN, HYUN JONG |
分类号 |
G11C16/30;H03K17/10;H03K17/687;(IPC1-7):H03K17/687 |
主分类号 |
G11C16/30 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|