发明名称 Active pull-down circuit for ECL using a capacitive coupled circuit
摘要 Fast fall time for ECL logic waveforms are produced by use of a circuit, which very quickly transfers charge from the ECL output load capacitance into a temporary holding capacitor. The charge transferred onto the temporary holding capacitor may then be removed at a leisurely pace. The circuit includes a pulldown transistor, and a control circuit that selectively turns the pulldown transistor on, if the ECL output will be low, or off, if the ECL output will be high. The control circuit includes an emitter-follower transistor which follows the differential ECL collector node that changes voltage inversely to the desired final ECL output. A diode is connected to the emitter-follower transistor's emitter so that the diode output is two diode drops below the ECL collector node inverse in polarity to the output. The diode drives the base of the pulldown transistor, so that the base of the pulldown transistor remains static until the inputs to the circuit change.
申请公布号 US5736866(A) 申请公布日期 1998.04.07
申请号 US19950555969 申请日期 1995.11.13
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 HARR, JEROME D.
分类号 H03K19/013;H03K19/086;(IPC1-7):H03K19/013 主分类号 H03K19/013
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