VLSI circuit layout method based on spreading functions and simulated annealing heuristics to minimize area

摘要

A VLSI circuit layout method includes defining a circuit to be designed in terms of a set of components V and a set of nets H connecting the components. A cost function is defined using a spreading function to define a cost of a VLSI circuit layout. A simulated annealing is applied to the cost function to produce a VLSI circuit layout having a minimal cost function. The resulting VLSI circuit layout requires minimal area.