| 摘要 |
PURPOSE:To attain the processing of a synchronizing signal by turning all phase delays of a transmission signal through wires connecting logical signal source to respective logical gates equivalently to zero based upon compensated phase amounts obtained from respective phase compensating parts. CONSTITUTION:At least a part of a wire consists of a microstrip line and has a phase compensating part formed by connecting a dielectric thin film having a dielectric constant different from that of a semiconductor substrate to the upper part and side face part of the microstrip line. A signal outputted from the logical signal source 1 is transmitted to (n) logical gates 2 expressed by G21 to G2n through wires 4 to 8 and the wiring lengths DD of respective wires 4 to 8 are respectively different values. If a phase constant beta to be the imaginary part of a propagation constant in each wire is set up so that the wire having the shortest wiring length D has the largest phase constant and the wire having the longest wiring length D has the smallest phase constant, the relation of beta1D1=beta2D2=to=betanDn can be satisfied. In this case, a broken line connecting respective longical gates 2 expresses an equal phase face (equal delay face). |
