发明名称 Clock Frequency Selection method for microprocessor Integrated circuit
摘要 The clock frequncy selection method has a first unit (21) measuring the level of the transmitted clock signal. If the clock signal level is low, a unit (22) finds the optimum clock frequency. When the optimum signal is found, a switching unit (24) switches the first level measuring unit to a second level measuring unit (23). The second unit transmits the newly selected clock frequency.
申请公布号 FR2754120(A1) 申请公布日期 1998.04.03
申请号 FR19970011292 申请日期 1997.09.11
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NIIMURA TAKASHI
分类号 G06K17/00;G06F1/06;G06F1/08;H03K5/00;H03K17/00;(IPC1-7):H03K19/20 主分类号 G06K17/00
代理机构 代理人
主权项
地址