METHOD OF FRANSIS TRANSISTOR MANUFACTURING

摘要

A fabrication method of transistors used for high integration memory devices is disclosed. The method comprises the steps of: sequentially forming an insulating layer(4) and a polysilicon layer(5) on a semiconductor substrate(1) having a field oxide(2); forming an insulating pattern(9) using mask at the time of ion-implanting on the polysilicon layer(5); forming a impurity region(3) by ion-implanting into the exposed polysilicon layer(5) to control the threshold voltage(Vt) of transistor; forming a selective metal(10) on the exposed polysilicon layer(5); and sequentially etching the polysilicon layer(5) and the insulating layer(4) using the selective metal(10) as an etching stopper. Thereby, it is possible to minimize the junction capacitance of source and drain regions.