发明名称 FREQUENCY-VOLTAGE CONVERSION CIRCUIT, DELAY AMOUNT JUDGEMENT CIRCUIT, SYSTEM HAVING FREQUENCY-VOLTAGE CONVERSION CIRCUIT, METHOD OF ADJUSTING INPUT/OUTPUT CHARACTERICTICS OF FREQUENCY-VOLTAGE CONVERSION CIRCUIT, AND APPARATUS FOR AUTOMATICALLY ADJUSTING INPUT/OUTPUT CHARACTERISTICS OF FREQUENCY-VOLTAGE CONVERSION CIRCUIT
摘要 <p>A frequency-voltage conversion circuit (21) is adapted to receive clock (CLK) as an input, and provide as an output a voltage (IVdd) corresponding to the frequency of the clock (CLK). The input/output characteristics of the frequency-voltage conversion circuit (21) are so adjusted that they substantially agree with given input/output characteristics.</p>
申请公布号 WO1998013742(P1) 申请公布日期 1998.04.02
申请号 JP1997003397 申请日期 1997.09.24
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