| 摘要 |
<p>The present invention relates to a hybrid integrated circuit that comprises a board (1) having a metallised recess (8) formed on its front or rear side. The lower plate (6) of the capacitor (5) is used for the metallisation of the recess, while the remaining part (9) of the board (1) under said recess (8) is used as the capacitor (5) dielectric. The upper plate (7) is located on the front side of the board (1) and represents the region for the metallisation layout pattern (2). The remaining thickness of the board (1) in the recess (8) ranges from 1 to 400 νm.</p> |
