DATA PROCESSOR AND DATA PROCESSING SYSTEM

摘要

A data processor (1) in which an instruction fetching unit (10) fetches an instruction, an instruction decoder (12) interprets the instruction latched in an instruction register (11), and an instruction executing unit (13) executes the instruction based on the results of interpretation by the decoder (12). One of task buffers (16 and 17) each provided with a program storing area (160 and 170) and a pointer (161 and 171) for successively reading out instructions stored in the areas (160 and 170) or the unit (10) is selected through a selector (18). The selection by the selector (18) is controlled by a switching control means (19) in accordance with an internally or externally generated event. Register means (S1 and S2) used exclusively for the task buffers (16 and 17) are provided in the instruction executing unit (13) so as to make the saving of the internal state of the unit (13) unnecessary when the task is switched by selecting a program stored in one task buffer from the outside. Therefore, the speed of switching the task is improved and the burden of the data processor (1) at the time of switching the task is reduced.