发明名称 Method for manufacturing a double-gated MOS transistor
摘要 <p>A method for manufacturing a semiconductor apparatus, providing steps of (i) laminating a first polysilicon layer on the whole surface of a semiconductor substrate through a first oxide layer, (ii) removing the first polysilicon layer and first oxide layer in an element separation region so as to form a trench therein and to treat the residual first polysilicon layer and first oxide layer as a bottom gate electrode and an insualating film respectively, (iii) forming a monocrystalline silicon layer by epitaxial growth on the whole surface of the semiconductor substrate including the trenches, (iv) removing the monocrystalline silicon layer in the element separation region, laminating a second oxide layer on the whole surface of the semiconductor substrate including the removing portion, and making the second oxide layer remain as an element separation film (6) in only the element separation region, and (v) forming a gate oxide film and a top gate electrode (9, 15) on the bottom gate electrode through the residual monocrystalline silicon film, and forming a source/drain region on the residual monocrystalline silicon film. <IMAGE></p>
申请公布号 EP0473397(B1) 申请公布日期 1998.04.01
申请号 EP19910307833 申请日期 1991.08.27
申请人 SHARP KABUSHIKI KAISHA 发明人 ADAN, ALBERTO OSCAR;HORITA, MASAYOSHI
分类号 H01L21/336;H01L21/76;H01L21/762;H01L21/763;H01L21/8238;H01L21/84;H01L27/092;H01L27/12;H01L29/423;H01L29/43;H01L29/49;H01L29/78;H01L29/786;(IPC1-7):H01L21/336;H01L21/82 主分类号 H01L21/336
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