A CIRCUIT FOR SOURCE CLOCK RECOVERY IN FIXED BIT RATE SERVICE USING SRTS ALGORITHEM

摘要

A circuit for recovering a source clock of an identical source bit rate service using a SRTS(SYNCHRONOUS RESIDUAL TIME STAMP) algorithm is disclosed. The circuit comprises a transmit clock information generating unit(1) for receiving a transmit clock and a network clock demultiplied by two provided from the network to generate a transmit clock, and for generating a RTS(Residual Time Stamp) in case that the RTS read(RTS-RD) signal is inputted; an AAL-1(ATM ADAPTATION LAYER-1) generating unit(2) for providing the RTS-RD and transmitting it to the ATM(ASYNCHRONOUS TRANSFER MODE) cell; an AAL-1 receiving unit(4) for disintegrating the information from the ATM cell to generate a RTS write(RTS-WR) signal and the RTS; and a transmit clock recovering unit(3) for receiving the RTS-WR, the RTS and the two-demultiplied network clock to generate a recovered clock.