| 发明名称 |
Differential stage logic circuit |
| 摘要 |
An ECL stage has its current consumption adapted to its operation speed. For this purpose, the load resistor and the bias current source are adjustable so that the product of the current value of the source by the resistor value is substantially constant.
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| 申请公布号 |
US5734272(A) |
申请公布日期 |
1998.03.31 |
| 申请号 |
US19960611426 |
申请日期 |
1996.03.06 |
| 申请人 |
SGS-THOMSON MICROELECTRONICS S.A. |
发明人 |
BELOT, DIDIER;DUGOUJON, LAURENT |
| 分类号 |
H03K19/00;(IPC1-7):H03K19/082;H03K19/013;H03K19/094 |
主分类号 |
H03K19/00 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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