发明名称 |
Semiconductor integrated circuit for outputting an intermediate potential |
摘要 |
A small-sized semiconductor integrated circuit is provided in which the potential of a predetermined node can be set to an intermediate potential in a short period after a power source is turned on. By using a power on reset signal which is inverted when a source potential is set to a predetermined intermediate potential, a P channel MOS transistor whose source directly receives the source potential supplies charges to the predetermined node at an early stage after the power source is turned on until the source potential reaches the intermediate potential.
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申请公布号 |
US5734281(A) |
申请公布日期 |
1998.03.31 |
申请号 |
US19960731992 |
申请日期 |
1996.10.23 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
MORISHIMA, CHIKAYOSHI;OHBAYASHI, SHIGEKI |
分类号 |
G11C11/413;G11C5/14;G11C11/407;H01L21/8238;H01L27/092;(IPC1-7):H03K17/22 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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