发明名称 Method and apparatus for reducing clock switching noise in continuous time filters
摘要 A method and apparatus for reducing reference frequency signal and/or clock switching noise in self-tuned integrated continuous-time filters. In the master-slave automatic tuning scheme, one or more sample-and-hold circuits sample and hold the frequency control signal and Q-control signal generated by the feedback loop(s) of the automatic tuning system. The control signals are held at a constant level for a period of time during which the reference frequency signal and/or clock signal are quiescent. At one or more predetermined times, the frequency control and Q-control signals are intermittently updated to automatically tune the slave filter.
申请公布号 US5731737(A) 申请公布日期 1998.03.24
申请号 US19960632976 申请日期 1996.04.16
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CRANFORD, JR., HAYDEN CLAY;HUSS, SCOTT DAVID
分类号 H03H11/04;H03K5/1252;H03K5/13;(IPC1-7):H03K5/00;H03B1/00 主分类号 H03H11/04
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