发明名称 |
Multichip semiconductor structures with consolidated circuitry and programmable ESD protection for input/output nodes |
摘要 |
Multichip semiconductor structures with consolidated circuitry are disclosed, along with programmable electrostatic discharge (ESD) protection circuits for chip input/output (I/O) nodes. The multichip structures include a first semiconductor chip having a first circuit at least partially providing a first predetermined circuit function, and a second semiconductor chip electrically and mechanically coupled to the first semiconductor chip. The second semiconductor device chip has a second circuit that at least partially provides a circuit function to the first circuit of the first semiconductor chip. In one embodiment, the first semiconductor chip comprises a memory array chip, while the second semiconductor chip comprises a logic chip wherein at least some peripheral circuitry necessary for accessing the memory array of the memory array chip resides within the logic chip. This allows the removal of redundant circuitry from identical chips of a multichip structure. Also disclosed is removing, adding or balancing ESD circuit loading on input/output nodes of a multichip stack. Various techniques are presented for selective removal of ESD circuitry from commonly connected I/O nodes. Any circuitry interfacing with an external device may be rebalanced at the multichip level using this concept. |
申请公布号 |
US5731945(A) |
申请公布日期 |
1998.03.24 |
申请号 |
US19970778399 |
申请日期 |
1997.01.02 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BERTIN, CLAUDE LOUIS;HEDBERG, ERIK LEIGHT;LEAS, JAMES MARO;VOLDMAN, STEVEN HOWARD |
分类号 |
H01L23/528;H01L23/60;H01L25/065;H01L27/02;(IPC1-7):H02H3/22 |
主分类号 |
H01L23/528 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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