发明名称 FORMATION APPARATUS FOR POSITIVE AND NEGATIVE PULSES
摘要 PROBLEM TO BE SOLVED: To provide a formation apparatus by which an inverter is operated normally without shortening the interval between DC voltages to be input from the inverter by providing a first AND circuit and a second AND circuit to which a PWM control signal or the output signal of a second inverter is input. SOLUTION: Output of a first flip-flop 27 and a second flip-flop 28 are input respectively to a second NAND circuit 26 and a first NAND circuit 25. A PWM control signal, the output signal of the first flip-flip 27 and the output signal, of a third inverter 31, in which the output of a second AND circuit 30 is inverted are input to a first AND circuit 29. The output signal of the second flip-flop 28 and the output signal, of a fourth inverter 32, in which the output of the first AND circuit 29 is inverted are input to the second AND circuit 30. Thereby, positive pulses and negative pulses having a dead time can be obtained from the single-phase PWM control signal, and an inverter can be operated normally without shortening the interval between DC voltages which are input from the inverter due to the dead time.
申请公布号 JPH1080155(A) 申请公布日期 1998.03.24
申请号 JP19960248626 申请日期 1996.08.30
申请人 SANSHA ELECTRIC MFG CO LTD 发明人 IKEDA TETSURO;WAKIYA KAZUHISA;OKAMOTO SHIGERU
分类号 H02M7/48;H02M7/537;H03K3/02;H03K5/151 主分类号 H02M7/48
代理机构 代理人
主权项
地址
您可能感兴趣的专利