发明名称 DEBUG SYSTEM AND DEBUG METHOD
摘要 PROBLEM TO BE SOLVED: To prevent the generation of any influence even at the time of extracting the information of the register of a CPU or the like by operating a target CPU in the same operating time as that at the time of actually operating it in a system to be debugged. SOLUTION: A user program is executed by a target CPU in a control circuit part 2 synchronously with an asynchronizing operating clock signal more speedy than the operating clock signal of a system to be debugged, and address bus information, data bus information, and machine cycle information at the time of execution is outputted by a control circuit part 2. Then, a POD part 3 generates each kind of control signal of the system to be debugged based on the machine cycle information, supplies the address bus information, data bus information, and each kind of control signal to the system to be debugged synchronously with the operating clock signal of the system to be debugged. Thus, the collection, output, or operation of debug information can be attained without stopping the system to be debugged by using the difference of the executing time of a user program between the system to be debugged and a target CPU 21.
申请公布号 JPH1078887(A) 申请公布日期 1998.03.24
申请号 JP19960233309 申请日期 1996.09.03
申请人 TOSHIBA CORP 发明人 NOGUCHI TOMOAKI;KAWAKITA HIDEYUKI
分类号 G06F11/34;G06F11/22;G06F11/26;G06F11/267;G06F11/36 主分类号 G06F11/34
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