发明名称 |
Microprocessor burst mode with external system memory |
摘要 |
A microcomputer architecture and method allows for high processing speeds. A microprocessor constitutes the central processing unit. The microprocessor comprises an on-chip cache memory and is capable of reading data in a burst mode. The central processing unit and the system memory communicate by way of a high speed host bus. The system memory is comprised of multiple buses and is capable of delivering data to the microprocessor in a burst mode at high speeds. A memory controller addresses data locations within the system memory upon receipt of a first host address from the microprocessor. Accordingly, the microprocessor can access data in the system memory at an extremely fast rate when operating in a burst mode. High speed processing is accomplished without the need for an external cache.
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申请公布号 |
US5732406(A) |
申请公布日期 |
1998.03.24 |
申请号 |
US19920950979 |
申请日期 |
1992.09.23 |
申请人 |
HEWLETT-PACKARD COMPANY |
发明人 |
BASSETT, CAROL ELISE;CAMPBELL, ROBERT GREGORY;LANG, MARILYN JEAN;BEGUR, SRIDHAR |
分类号 |
G06F12/02;G06F12/08;G06F13/16;G06F13/28;(IPC1-7):G06F13/14 |
主分类号 |
G06F12/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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