发明名称 |
Electrostatic discharge suppression circuit employing trench capacitor |
摘要 |
An enhanced electrostatic discharge suppression circuit is disclosed for protecting integrated circuit chips from electrostatic discharges or other potentially damaging voltage transients on an input/output pad. The suppression circuit includes a discharge circuit, electrically coupled to the input/output pad, having a diode comprising a diffusion in a substrate well formed in a substrate. The diffusion is connected to the input/output pad of the integrated circuit. A capacitor is locally provided to couple the substrate well to the substrate. The capacitor is sized to maintain the diode in a forward-bias mode during the electrostatic discharge event, thereby facilitating dissipating of the electrostatic discharge. The capacitor comprises a trench capacitor, which depending upon the configuration, may function as a guard ring for the discharge circuit. Certain beneficial parasitic effects are also discussed in association with integration of a trench capacitor into the suppression circuit.
|
申请公布号 |
US5731941(A) |
申请公布日期 |
1998.03.24 |
申请号 |
US19950525110 |
申请日期 |
1995.09.08 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
HARGROVE, MICHAEL JOHN;VOLDMAN, STEVEN HOWARD |
分类号 |
H01L27/02;(IPC1-7):H02H9/00 |
主分类号 |
H01L27/02 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|