发明名称 |
MOSFET transistor cell manufactured with selectively implanted punch through prevent and threshold reductoin zones |
摘要 |
A n-channel MOSFET device is formed with a selective high energy boron implantation into the N region of the n- channel where a photoresist is employed to cover the central portion over the channel. Small n- regions are formed near the channel source interface. These small n- regions have the advantages of preventing punch through. The selective implant regions have the additional advantages that the JFET resistance is not increased as a result of forming a punch through prevention region near the source channel boundary. Also disclosed in this invention is a p-type DMOS where a novel boron implantation is applied to reduce the threshold voltage. The boron is selectively implanted into the n-type channel near the source, i.e., a threshold sensitive region. The threshold voltage is reduced without unduly lowering the drain to source breakdown voltage.
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申请公布号 |
US5731611(A) |
申请公布日期 |
1998.03.24 |
申请号 |
US19960593967 |
申请日期 |
1996.01.30 |
申请人 |
MEGAMOS CORPORATION |
发明人 |
HSHIEH, FWU-IUAN;LIN, TRUE-LON |
分类号 |
H01L21/336;H01L29/08;H01L29/78;(IPC1-7):H01L27/76;H01L29/94;H01L31/062 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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