发明名称 Memory having selectable output strength
摘要 An output buffer circuit of a semiconductor memory device can produce multiple output buffer drive strengths. An electronic system including a memory device in which such an output buffer circuit is implemented can include a mechanism for enabling the output buffer drive strength to be easily selected by a user of the memory device (such as an assembler of an electronic system including the memory device) from the multiple possible drive strengths. The invention thus enables a memory device to be easily configured to have an output buffer drive strength that is compatible with a wide variety of electrical loads to be driven by the output buffers of the memory device. Since the output buffer circuit of the invention allows the output buffer drive strength to be more closely tailored to the electrical load being driven, signal reflections, voltage overshoot and undershoot, and timing problems that can result from mismatch between the output buffer drive strength and the associated electrical load can be reduced.
申请公布号 US5732027(A) 申请公布日期 1998.03.24
申请号 US19960777488 申请日期 1996.12.30
申请人 CYPRESS SEMICONDUCTOR CORPORATION 发明人 ARCOLEO, MATHEW R.;LEONG, RAYMOND M.;JOHNSON, DEREK R.
分类号 G11C11/417;G11C7/10;G11C11/409;H03K19/0175;(IPC1-7):G11C7/06 主分类号 G11C11/417
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