发明名称 One transistor ferroelectric memory cell and method of making the same
摘要 A method of forming a semi-conductor structure forming, on a prepared substrate, a ferroelectric memory (FEM) gate unit. A gate junction region is formed between the source junction region and the drain junction region for the FEM gate unit on a FEM gate unit device area, which FEM gate unit includes a lower metal layer, a ferroelectric (FE) layer, and an upper metal layer, and which is formed on a conductive channel precursor. The structure of the semiconductor includes a substrate, which may be either bulk silicon or SOI-type silicon, conductive channels of first and second type formed above the substrate, an FEM gate unit formed above a channel region, wherein the FEM gate unit includes a lower metal layer, an FE layer, and an upper metal layer, and wherein a conductive channel of a second type is formed under the FEM gate unit.
申请公布号 US5731608(A) 申请公布日期 1998.03.24
申请号 US19970812579 申请日期 1997.03.07
申请人 SHARP MICROELECTRONICS TECHNOLOGY, INC.;SHARP KABUSHIKI KAISHA 发明人 HSU, SHENG TENG;LEE, JONG JAN
分类号 G11C11/22;H01L21/28;H01L21/8246;H01L21/84;H01L27/115;H01L29/78;(IPC1-7):H01L21/824 主分类号 G11C11/22
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