| 摘要 |
A reception clock signal used for a data sampling unit to sample received data is generated by a reception clock generator based on a reference clock signal, which is generated by a reference clock generator based on a reference bit rate frequency. The reference bit rate frequency is produced by a reference oscillator which is controlled by a control voltage. The control voltage is generated by a phase difference-to-voltage converter depending on the phase difference, detected by the reception clock generator, between the timing of a change in the received data and the reference clock signal. If good reception sensitivity is not available due to a phase difference, then the phase difference-to-voltage converter generates a control voltage in a manner to eliminate the phase difference, and applies the generated control voltage to a variable capacitor connected to the reference oscillator for automatically adjusting the reference bit rate frequency.
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