发明名称 SYSTEM AND METHOD FOR FAST CLOCKING A DIGITAL DISPLAY IN A MULTIPLE CONCURRENT DISPLAY SYSTEM
摘要 A clocking system including a line clock system for generating normal line clock pulses to the digital display during the period when the image is being rendered and for generating fast line clock pulses to the digital display during the vertical blanking period to address the otherwise unaddressed vertical region. The clocking system further includes a pixel clock system for generating normal pixel clock pulses to the digital display during the period when the image is being rendered and for generating fast pixel clock pulses to the digital display during the horizontal and vertical blanking periods to address the otherwise unaddressed horizontal and vertical regions.
申请公布号 CA2211510(A1) 申请公布日期 1998.03.24
申请号 CA19972211510 申请日期 1997.07.25
申请人 SEIKO EPSON CORPORATION;SEIKO EPSON CORPORATION 发明人 LOW, WILLIAM;TUCKER, DAVID M.
分类号 G09G3/20;G09G3/36;G09G5/00;G09G5/12;G09G5/18;G09G5/36;G09G5/391;H04N5/66;(IPC1-7):G09G5/00 主分类号 G09G3/20
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