发明名称 Semiconductor memory device
摘要 In relation to the built-in self-test circuit (BIST circuit) for testing CAM macros, the present invention is intended to provide a means to enable reduction in amount of materials as required for wiring channel region for signal distribution, buffer, FF, etc., and in number of LSI pins, and further, to facilitate mounting on chips. The data generators for CAM testing, inserted between the APG for RAMs and CAM macros, create data to write to the CAM macros by obtaining the address signals directly or by decoding the same signals. The APG is common to all the memory macros, and testing proper to each CAM can be carried out by changing over the operation of the inserted data generators by means of the control signal. The data generators are arranged in the proximity of the CAM macros, the circuits to be tested.
申请公布号 US2006195743(A1) 申请公布日期 2006.08.31
申请号 US20060335464 申请日期 2006.01.20
申请人 HITACHI, LTD. 发明人 AIHARA YOICHIRO;NISHIYAMA MASAHIKO;SASAKI DAISUKE
分类号 G01R31/28;G06F11/00 主分类号 G01R31/28
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