发明名称 Input buffer protection circuit for integrated semiconductor circuit, e.g. CMOS gate array
摘要 The input buffer circuit is located in the input stage of the integrated circuit. Its input is coupled to at least one gate electrode (6cx,8cx) of at least one input transistor (6,8), contg. a gate length greater than that of conventional type. Pref. the input transistor is of MOS type while a further MOS transistor, forming a capacitive element, has a gate electrode coupled to the input of the input buffer electrode. There may be a gate array with numerous gate electrodes of conventional type but with a preset number of gate electrodes of greater gate length.
申请公布号 DE19724487(A1) 申请公布日期 1998.03.12
申请号 DE19971024487 申请日期 1997.06.10
申请人 MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP 发明人 KONNO, HIDEKI, TOKIO/TOKYO, JP
分类号 H01L27/04;H01L21/82;H01L21/822;H01L21/8238;H01L27/092;H01L27/118;(IPC1-7):H01L23/60 主分类号 H01L27/04
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