| 摘要 |
A method and apparatus for selecting test modes of an integrated circuit is provided. According to one aspect of the invention, a serial stream of digital signals comprising a number of predetermined patterns is applied to the integrated circuit. The integrated circuit identifies the patterns in the serial stream of digital signals and selects the test modes based upon the identified patterns. According to another aspect of the present invention, the patterns each contain n bits and are selected such that when transitioning from one of the patterns to another of the patterns in the serial stream of bits none the patterns are present in an n bit window. According to another aspect of the present invention, each occurrence of each pattern in the serial stream of bits is immediately preceded and followed by an inactive pattern. According to another aspect of the present invention, the test modes are also selected based upon the mode the integrated circuit is currently operating in.
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