发明名称 Block normalization processor
摘要 A method and apparatus for implementing a vocoder in a application specific integrated circuit (ASIC) is provided. The apparatus contains a DSP core that performs computations in accordance with a reduced instruction set (RISC) architecture. The circuit further includes a specifically designed slave processor to the DSP core referred to as the minimization processor. The apparatus further comprises a specifically designed block normalization circuitry.
申请公布号 US5727123(A) 申请公布日期 1998.03.10
申请号 US19950575303 申请日期 1995.12.20
申请人 QUALCOMM INCORPORATED 发明人 MCDONOUGH, JOHN G.;CHANG, CHIENCHUNG;SINGH, RANDEEP;SAKAMAKI, CHARLES E.;TSAI, MING-CHANG;KANTAK, PRASHANT
分类号 G10L19/08;G06F5/01;G10L19/00;G10L19/02;G10L19/04;G10L19/06;G10L19/12;G10L19/14;H03M7/30;(IPC1-7):G10L3/00 主分类号 G10L19/08
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