| 摘要 |
PROBLEM TO BE SOLVED: To generalize and digitize a clock generating device for an IC card with an external terminal. SOLUTION: A transfer clock generation part 2 has a D type flip-flop(DFF) 30 which inputs an internal clock and outputs a clock for pre-transfer having a specific cycle ratio and cycles adjusted, a toggle flip-flop(TFF) 31 which divides the frequency of the inversion output of the DFF 30 into two to generate a clock for transfer, a down counter 27 which inputs the inverted internal clock and outputs a signal having a specific clock interval CNT, a shift register 25 which shifts a set 12-bit cycle adjustment value, bit by bit, and outputs it as a signal indicating a cycle adjustment point of the transfer clock, an adjustment direction specifying register 35 which has the increase/decrease direction ADIR of the adjustment value set, a comparator 28 which outputs an internal signal according to the output of the down counter 27, and a multiplexer 29 which inputs the outputs of the comparator 28 and adjustment direction specifying register 35 and outputs a signal (1) or (0) to the DFF 30. |
