发明名称 MASK AND ITS INSPECTION METHOD AND EXPOSURE METHOD
摘要 PROBLEM TO BE SOLVED: To make it possible to easily measure the misalignment quantity of circuit patterns and to prevent the degradation in the yield of integrated circuits by providing circuit pattern regions with patterns for position measurement for measuring the misalignment of circuit patterns. SOLUTION: Reticle alignment marks 3 are formed in the peripheral parts on a glass substrate 6 and the circuit patterns 1 are formed in the circuit pattern regions 8 on the inner side enclosed by light shielding regions 2 in the central part. Further, the patterns 5 for position measurement are formed in the circuit pattern regions 8. The position coordinates of the patterns 5 for position measurement formed in the regions of the circuit patterns 1 in such a manner are previously measured with the reticle alignment marks 3 as a reference by using a suitable position coordinate measuring instrument, by which the relative misalignment quantity of the circuit patterns 1 for the reticle alignment marks 3 of the reticle mask which is used in the respective production stages of semiconductor integlated circuit and between the respective reticles of the patterns 5 for position measurement is known.
申请公布号 JPH1069066(A) 申请公布日期 1998.03.10
申请号 JP19960229094 申请日期 1996.08.29
申请人 NEC CORP 发明人 SASAKI TAKAMIZU;TAKAOKA HAJIME
分类号 G03F1/38;G03F1/42;G03F1/44;G03F1/84;G03F7/20;G03F9/00;H01L21/027;H01L21/66 主分类号 G03F1/38
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