发明名称 PLASMA DISPLAY PANEL AND MANUFACTURE THEREFOR
摘要 PROBLEM TO BE SOLVED: To prevent the latch-up phenomenon in which operation failure of an address electrode is generated by a discharge due to the stored charge by coating plural address electrodes with a dielectric layer contaminated with conductive grains. SOLUTION: A bedding dielectric layer 21 and address electrode layers A1-A3 are formed on a glass substrate 20, the surface of which is washed, and the low-melting point glass paste, which includes conductive grains 30 at 2-8μm of mean grain diameter at 0.5-5wt.% is coated on the address electrodes A1-A3, and it is baked so as to form a dielectric layer 22. Partitioning walls 23 are formed on the dielectric layer 22, and the phosphor 24 is coated between the partitioning walls 23 so as to obtain a back surface side glass substrate. On the other hand, scan electrodes 13X, Y crossing the address electrodes A1-A3, a dielectric layer 14 and a protective layer 15 are formed on the glass substrate 10 so as to obtain a surface side glass substrate. A peripheral edge of the back surface side glass substrate and the surface side glass substrate are adhered to each other through a seal layer 26.
申请公布号 JPH1064434(A) 申请公布日期 1998.03.06
申请号 JP19970027996 申请日期 1997.02.12
申请人 FUJITSU LTD 发明人 OTSUKA AKIRA;NAKAHARA HIROYUKI;NANTO TOSHIYUKI;SASAO HIROMICHI;AWAJI NORIYUKI;BETSUI KEIICHI;TADAKI SHINJI
分类号 H01J9/02;H01J11/00;H01J11/02;H01J11/14;H01J11/22;H01J11/24;H01J11/28;H01J11/34;H01J11/38;H01J17/49;(IPC1-7):H01J11/02 主分类号 H01J9/02
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