发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To realize a memory macro or a memory core having little coverhead of a circuit in a semiconductor integrated circuit device on which a memory logic circuit is accumulated on the same semiconductor chip. SOLUTION: A memory core having a plurality of I/O lines, a transfer circuit module and a logic library are created, they are stored in a data base, and a semiconductor integrated circuit is designed using them. Further, the memory core and a logic circuit, having a plurality of I/O lines, are arranged in such a manner that the I/O lines direct in the same direction, and a transfer circuit, consisting of a multistage switching group, is arranged between the I/O lines of the memory core and the logic circuit. When the switch group having a stage or a small number of stages is turned on, the I/O line of the memory core and the I/O line of the logic circuit are conducted, and a desired transfer pattern is formed. In addition, the memory core is constituted by integrating an amplifier module, a bank module, a functional module such as the power source, etc., and a row circuit, which functions independently in the bank module, and a number of I/O lines, extending in the direction of the bit line, are arranged.
申请公布号 JPH1065124(A) 申请公布日期 1998.03.06
申请号 JP19960301538 申请日期 1996.11.13
申请人 HITACHI LTD;HITACHI VLSI ENG CORP 发明人 WATABE TAKAO;TANAKA HITOSHI;YANAGISAWA KAZUMASA;FUJITA MAKOTO;AYUKAWA KAZUSHIGE
分类号 G11C11/401;H01L21/82;H01L21/822;H01L21/8242;H01L27/04;H01L27/108 主分类号 G11C11/401
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