Synchronous mirror delaySMD circuit and method including a counter and reduced size bi-directional delay line,申请号KR20047021363-传众专利搜索

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发明名称	Synchronous mirror delaySMD circuit and method including a counter and reduced size bi-directional delay line
摘要
申请公布号	KR100847429(B1)	申请公布日期	2008.07.21
申请号	KR20047021363	申请日期	2004.12.20
申请人		发明人
分类号	H03L7/00;G11C7/22;G11C11/407;H03H11/26;H03K5/135;H03L7/081	主分类号	H03L7/00
代理机构		代理人
主权项
地址

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