| 摘要 |
PROBLEM TO BE SOLVED: To lay out as one block with an adder which performs last row adding processing in a digital multiplier, to reduce useless space where no cell exists, to provide a layout of high density and to entirely output each bit of a multiplied result output signal in the same direction. SOLUTION: A digital multiplier is provided with partial product generation addition array 21 and a last row adder 22. The adder 22 is divided between even bit cell array 22A which consists of plural adder cells to generate even bits in a multiplied result output signal Z and odd bit cell array 22B which consists of plural adder cells to generate odd bits in the signal Z and is parallelly arranged along a bit direction in the array 21. |
