发明名称 TWO-DIMENSIONAL REVERSE DISCRETE COSINE TRANSFORMATION CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide a two-dimensional(2D) reverse discrete cosine transformation circuit capable of reducing operation quantity by omitting operation when zero is included in input data in a tensor product competing element and attaining high speed operation. SOLUTION: First to 9th judging devices for respectively inputting input data from 1st to 9th tensor product computing elements check whether respective input data are non-zero data or not and inform the corresponding tensor product computing elements of the judged results. When all input data are judged as zeros by the 1st to 9th judging devices, tensor product operation is not executed by the 1st to 9th tensor computing elements.</p>
申请公布号 JPH1063646(A) 申请公布日期 1998.03.06
申请号 JP19960241069 申请日期 1996.08.23
申请人 NEC CORP 发明人 MURATA HIDESATO;KURODA ICHIRO
分类号 H03M7/30;G06F17/14;(IPC1-7):G06F17/14 主分类号 H03M7/30
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