发明名称 |
ATM CELL TRANSMITTING DEVICE |
摘要 |
<p>PROBLEM TO BE SOLVED: To provide a FIFO memory with a capacitance satisfying the whole quality classes without providing the FIFO memories at every virtual channel and also to prevent a hardware quality from being vast by providing quality classes in accordance with transmission delay permission quantity in ATM. SOLUTION: Cells are classified by quality class and stored in buffers 1n∼n and 21∼n . The cells are read out of the buffer of the quality class with high priority and shift is successively executed to the low-order ones. Otherwise a cell of the low-order class is inserted between the cells when there is a room in the transmission schedule of the cells in the high quality class with high priority. Thus, cell transmission which satisfies request quality as against transmission delay is executed with a small hardware quantity.</p> |
申请公布号 |
JPH1065709(A) |
申请公布日期 |
1998.03.06 |
申请号 |
JP19970114735 |
申请日期 |
1997.05.02 |
申请人 |
NIPPON TELEGR & TELEPH CORP <NTT> |
发明人 |
UMEHIRA MASAHIRO;SATOU KIYOSHI;SUGIYAMA TAKATOSHI;OTA ATSUSHI;SAGAWA YUICHI |
分类号 |
H04Q3/00;H04L12/28;(IPC1-7):H04L12/28 |
主分类号 |
H04Q3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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