发明名称 MULTI-CHIP MODULE
摘要 PROBLEM TO BE SOLVED: To provide a multi-chip module for preventing ringing from increasing owing to the increase and reflection of wiring delay by suppressing the increase in size of a substrate size and the extension of wiring length. SOLUTION: A bare chip IC1 is mounted to a multilayer board 3 and is electrically connected to a multilayer board 3 and a bare chip IC1 by a wire 2. I/O terminals 5a and 5b supply signals, power supplies, or ground to the multilayer board 3 and an I/O terminal connection pad 6 is provided between the multilayer board 3 and the I/O terminals 5a and 5b. The I/O terminals 5a and 5b are also connected to a multilayer board 7 for converting the number of I/O terminals. The multilayer board 3 and an I/O pad 19 provided on the multilayer board 7 for converting the number of I/O terminals are connected. In this manner, signals in the multilayer board 3 and the multilayer board 7 for converting the number of I/O terminals are connected at both the I/O terminals 5a and 5b and the conductor 8 of a flexible board.
申请公布号 JPH1065095(A) 申请公布日期 1998.03.06
申请号 JP19960214578 申请日期 1996.08.14
申请人 OKI ELECTRIC IND CO LTD 发明人 KANEYAMA FUMIYASU
分类号 H01L23/32;H01L23/52;H01L25/065;H01L25/07;H01L25/18;H05K1/14;H05K3/36;(IPC1-7):H01L25/065 主分类号 H01L23/32
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