发明名称 Clocked power amplifier circuit using DC to DC converters
摘要 The circuit has the input (3) of the amplifier connected to the feedback input (2) of the converter (1), the control output pin (4) of the converter connected to the gate pin (5) of the electronic switch (6), and one pole (8) of the electronic switch connected to the amplifier output (9). The earth side of the input and output is connected to the pin (14) marked GND. The DC to DC converter and the DLC member (7) are wired up in step-down (buck), step-up (boost), inverting and flyback transformer circuits. The amplifier input is actually connected to the converter feedback input by inverting and non-inverting amplifiers.
申请公布号 DE19634833(A1) 申请公布日期 1998.03.05
申请号 DE19961034833 申请日期 1996.08.28
申请人 TKADLEC, STANISLAV, DIPL.-ING., 81737 MUENCHEN, DE 发明人 TKADLEC, STANISLAV, DIPL.-ING., 81737 MUENCHEN, DE
分类号 H02M3/10;(IPC1-7):H02M3/00 主分类号 H02M3/10
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