发明名称 INSTRUCTION PARALLEL ISSUE AND EXECUTION ADMINISTRATING DEVICE
摘要 In a superscalar processor for fetching a prescribed peak number of instructions in parallel in each period until the number of instructions fetched reaches a predetermined peak number, such as ten, an instruction parallel issue and execution administrating device comprises a forward map buffer 61 which stores a forward map indicative of use of a result produced by complete execution of each of the prescribed number of instructions as an operand by others of the prescribed number of instructions. The forward map is developed before the result is actually produced and is used to identify, after the actual production of the result by complete execution of the instruction, which one of the others of the instructions is to use as an operand the result indicated by the forward map.
申请公布号 GB2316781(A) 申请公布日期 1998.03.04
申请号 GB19970018528 申请日期 1997.09.01
申请人 * NEC CORPORATION 发明人 MASATO * MOTOMURA
分类号 G06F9/38;(IPC1-7):G06F9/38 主分类号 G06F9/38
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