| 摘要 |
<p>A main CPU 11, a main memory 12, a main DMAC (direct memory access controller) 13 and a picture processing unit (graphic processing unit or GPU) 15 are interconnected over a main bus 1. In an input/output unit of each of the main CPU 11 and the GPU 15 are mounted programmable packet engines (PPE) 112, 152 capable of modifying the data packetizing/unpacketizing sequence in order to perform packet transfer with freedom in the packet form. This affords freedom to the packet form to realize efficient development and packing of packet data and efficient drawing processing. <IMAGE></p> |
