| 摘要 |
<p>The present invention relates to a digital delay line for supplying, from a periodic input signal (fx), n signals of the same period (P1... Pi... Pn) mutually phase-shifted by the nth of the period of the input signal, comprising n cells (C1 to Cn) each of which comprises m elementary delay elements in series, each output of a delay element being linked to an input of a multiplexer; means for comparing the phase (Pn) of the output of the nth cell to that of the input signal; and means for modifying the output of a multiplexer as a result of each comparison. <IMAGE></p> |
