| 摘要 |
<p>A detection circuit (111; 211; 312; 414; 514; 611; 714; 814; 916; 1011; 1111, 1126) of a synchronizer detects a difference between a reference timing of a transmitter and a reference timing of a receiver based on a time of receiving a known transmission pattern sent from the transmitter. An average value calculation circuit (113; 213; 314; 416; 518; 613; 718; 821, 823; 918; 1018; 1113, 1128) calculates an average value of the difference detected by the detection circuit. An integration circuit (115; 215; 316; 418; 520; 615; 825; 920; 1020; 1115, 1130) determines an integrated value by integrating the average value each time of interrupting the receiver. A correction value calculation circuit (117; 217; 318; 420; 522; 617; 827; 911, 922; 1015, 1022; 1117, 1132) calculates a correction value to correct the reference timing of the receiver in forward direction in the case where the integrated value exceeds a predetermined first threshold level and to correct the reference timing of the receiver backward in the case where the integrated value is reduced below a predetermined second threshold level. <IMAGE></p> |
