| 摘要 |
A non volatile memory device is provided to increase the reliability of a test by configuring the memory cells under the same environment condition which is used in a real memory cell. A plane areas(211,212) are arranged in the neighboring of a decoder area, and a pad area(250) is arranged in the scribe region. The test block region(261,262) are arranged at the lower part of the plane area and is connected to the pad area. The block selection transistor region(230) is arranged in the decoder area.
|
