发明名称 Automatic cache controller system and method therefor
摘要 Signalling apparatus are used for monitoring a clock signal from a system controller to a processor. If the clock signal is low, indicating that the processor is disabled, the signalling apparatus will place the cache memory in a "sleep" mode. Thus, the signalling apparatus allow a computer system, upon which the signalling apparatus is a part of, to lower its power consumption. If the computer system is a portable computer system, the signalling apparatus will lower power consumption thereby extending the lifetime of the portable computer's batteries.
申请公布号 US5724611(A) 申请公布日期 1998.03.03
申请号 US19960637513 申请日期 1996.04.25
申请人 VLSI TECHNOLOGY, INC. 发明人 EVOY, DAVID ROSS
分类号 G06F1/32;G06F12/08;(IPC1-7):G06F13/00 主分类号 G06F1/32
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