CIRCUIT ARRANGEMENT AS A BRIDGE BETWEEN TWO COMPUTER BUSES

摘要

The PCI/ISA bridge (34) is coupled between the PCI and ISA buses (30,32) in a computer system. A PCI master (42) in the system asserts addresses and address parity information on the PCI bus (30) to initiate a master-slave transaction over the PCI bus. The bus bridge includes logic (60) for comparing the address and address parity information, and generating an address parity error signal when there is an address parity error. - The bridge also includes a PCI slave (40) that receives the address parity error signal, and generates a target-abort signal in response if the PCI slave (40) has already claimed the address by asserting a device select signal. the bridge also includes logic that prevents the target-abort signal from propagating to the PCI bus (30) whenever the logic receives both the address parity error signal and the device select signal. This allows the master to perform a master-abort, and prevents the slave on the bridge from performing a target-abort when there is an address parity error.