| 发明名称 |
BUS ASSIGNMENT SYSTEM FOR DSP PROCESSORS. |
| 摘要 |
<p>Three DSP processors selectively require access to a shared resource, such as an external memory, via a common communication bus. A control unit controls bus assignment to the processors to allow this access. The bus is assigned by default to the control unit rather than a processor.</p> |
| 申请公布号 |
MX9701974(A) |
申请公布日期 |
1998.02.28 |
| 申请号 |
MX19970001974 |
申请日期 |
1995.09.08 |
| 申请人 |
IONICA INTERNATIONAL LIMITED |
发明人 |
DAVID JOHN SPREADBURY;CLIVE RUSSELL IRVING |
| 分类号 |
G06F13/364;(IPC1-7):G06F13/364 |
主分类号 |
G06F13/364 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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